Main Article Content
Image processing has applications in real-time in various fields, including feature recognition, forensics, military applications, and clinical so on. Image processing algorithms require a colossal amount of data to be stored since these algorithms operate on a plethora of array of pixels. Furthermore, the actual application requires these algorithms to be delivered at higher throughput and low latency, for instance, live video telecast and live object tracking. The parallelism and reconfigurable nature of FPGA and the high number of assets accessible on FPGA fill in as an ideal platform to accomplish this task in real-time. Edge detection is one of the crucial algorithms of image processing, after that, other algorithms such as object recognition, feature extraction depend. A great deal of researchers has aimed at various edge detection strategies. Several edge detection algorithms such as Roberts, Prewitt, Sobel, Scharr, and Canny are analyzed using the Xilinx Zed board and SoC design flow in this paper. The xfopenCV library has been utilized for edge detection, developed explicitly for Xilinx FPGAs and SoCs, can run up to 40 times faster than GPUs and 100 times faster than CPUs..
This work is licensed under a Creative Commons Attribution-NonCommercial 4.0 International License.